{"text_format":"1","workbook":"xlsx","n_sheets":10,"sheets":["Title","Rev History","Instructions","DDR4 Spec","DDR4 Config","System Config","Power Calcs","Summary","Module Calc","Module Config (OLD)"],"not_rendered":{"charts":2,"images":8,"macros":1,"external_links":0,"defined_names":7,"comments":0,"pivot_tables":0},"unopened":[],"bounds":{"document_bytes":16777216,"sheet_cells":100000,"rows_first":2000,"rows_last":500,"rows_between":2000,"halvings":0,"cell_chars":16384,"cell_head_chars":4096},"cells_cut":0,"cells_raw":0,"read":"whole","date_system":"1900"}

{"sheet":"Title","index":0,"n_rows":18,"n_cols":4,"rows_kept":18,"cut":false,"hidden":false,"merged":[]}
[]
[null,"File Name",":","DDR4_Power_Calc.XLSM"]
[null,"Revision",":",5]
[null,"Date",":","2023-01-11"]
[null,"Document ID",":","CCM005-1406124318-10456"]
[null,"Company",":","Micron Technology, Inc."]
[]
[null,"Description",":","Calculates the power consumed by a DDR4 SDRAM based on system use parameters and the device data sheet."]
[]
[null,"Limitations",":","This calculator does not apply for 3DS DDR4 devices.  "]
[]
[null,"Notes",":","For x16, use equivalent speed grade noted in DDR4 Spec page."]
[]
[null,"Disclaimer",":","This spreadsheet is for estimating purposes only and does not estimate power for every mode of operation described in the data sheet. Any information provided herein is provided \"as is\" and without warranties of any kind.  Micron warrants only that its’ products comply with Micron's specification sheet for the product at the time of delivery, provided that deviations from specifications which do not materially affect form, fit or function of such product in the system and configuration in or for which it is initially installed or qualified by customer shall not be deemed to constitute failure to comply with such specifications."]
[null,null,null,"See Micron's standard terms and conditions of sale for complete warranty details."]
[]
[null,null,null,"Copyright © 2019 Micron Technology, Inc."]
[null,null,null,"All rights reserved."]

{"sheet":"Rev History","index":1,"n_rows":4,"n_cols":2,"rows_kept":4,"cut":false,"hidden":false,"merged":[]}
["Date","Notes"]
["2016-06-27","Initial Revision"]
["2019-07-09","Updated for Module Calculation"]
["2023-01-11","Instructions tab, clarify C16 that Density configuration refers to die density, not package\nDDR4 Config tab, changed label in C7 to DRAM Die Density\nModule Calc tab, changed D7 calculation to correctly identify package density based on die density and SDP/DDP. Error in DDP calculations fixed."]

{"sheet":"Instructions","index":2,"n_rows":56,"n_cols":6,"rows_kept":56,"cut":false,"hidden":false,"merged":[]}
[]
[]
[]
["Instructions for Use"]
[null,"DDR4 Spec tab (ALL MUST BE VERIFIED FOR A SPECIFIC DRAM DATA SHEET)"]
[null,null,"Inputs are required for all densities and speed grades that may be chosen. Densities/speed grades that are not desired may be left blank."]
[null,null,"Enter VDD tolerance range in rows 7-8."]
[null,null,"Enter VPP tolerance range in rows 9-10."]
[null,null,"Enter IDD values for the speed grade under investigation in rows 13-51. If a specific configuration is not desired, the IDD values can be left blank."]
[null,null,"If x4 and x8 IDDs are listed in the datasheet together, use the same value in each table entry. "]
[null,null,"Use IPP3N for either IPP4R or IPP4W if they don’t exist: if IPP4R or IPP4W is less than IPP3N then use IPP3N"]
[null,null,"Timing restrictions in rows 53-65 are entered from the data sheet. These determine the test conditions for the IDD values and restrictions of normal device operation."]
[null,null,"If any MR options such as Additive latency, ODT, CA Latency, CA Parity, DBI, CRC, or Fine granularity refresh (FGRM) are desired, adjust the DDR4 Spec accordingly per the %derating values defined in the component data sheet IDD tables."]
[]
[null,"DDR4 Config tab (ALL MUST BE ENTERED TO IDENTIFY DRAM TO BE USED FOR POWER CALCULATION)"]
[null,null,"Row 7 selects which DRAM die density."]
[null,null,"Row 8 selects the number of DQ's"]
[null,null,"Row 9 selects the starting speed grade"]
[null,null,"Row 10 selects whether DBI Mode is enabled or not"]
[null,null,"Row 11 selects the package type. Note - this is ONLY required if module power calculation is desired, which is why DDP1R (x16) is not listed. Otherwise, this cell is a don’t-care."]
[]
[null,"System Config Usage Conditions tab (ALL MUST BE ENTERED FOR SPECIFIC SYSTEM)"]
[null,null,"Row 7 is the actual VDD the system is operating at. It is usually set to nominal conditions."]
[null,null,"Row 8 is the actual VPP the system is operating at. It is usually set to nominal conditions."]
[null,null,"Row 9 is the clock rate the DRAM is operating at. This is one half of the data rate. Calculator inserts clock rate selected, maybe over written; if done, spare formula to the left may be pasted"]
[null,null,"Row 10 is the burst length programmed in the mode register. (The model does not calculate power if burst interrupt is utilized.)"]
[null,null,"Row 12* is the amount of power that is drawn per output while driving read data from itself. "]
[null,null,"Row 13* is the amount of power that is drawn per output while terminating write data to itself. "]
[null,null,"Row 14* is the amount of power that is drawn per DQ while terminating read data at different DRAM Rank (two or more loads). ",null,null," "]
[null,null,"Row 15* is the amount of power that is drawn per DQ while terminating write data at different DRAM Rank (two or more loads). "]
[null,null,"     *These are system-dependent and must be calculated. The value may be approximated with a DC calculation (calculator provided) or more accurately determined using SPICE models."]
[]
[null,null,"For Rows 17-27, the user must select either a pre-defined set of values OR a \"user defined\" option from the drop-down menu. If the \"user-defined\" option is selected, the user must populate column J with values. The google stress values defined are for 1DPC loading only."]
[null,null,"Row 17 (BNK_PRE%) is the time when all banks are in a precharged state. This is the amount of time when no bank has been activated."]
[null,null,"Row 18 (CKE_LO_PRE%) is the percentage of time that all that banks are precharged when the device is in power-down state. This is the percentage of time when the DRAM is using IDD2P vs. IDD2N."]
[null,null,"Row 19 (CKE_LO_ACT%) is the percentage of DRAM active time when CKE is LOW and the device is in the power-down state. This is the percentage of active time when the DRAM is using IDD3P current vs. IDD3N."]
[null,null,"Row 20 (PH%) is the page hit rate. 0% means there are no page hits (i.e., one read/write per each activate)."]
[null,null,"Row 21 (RDsch%) is the percentage of clocks that data is read from the DRAM. This would be equal to the average read bandwidth divided by peak read bandwidth. This parameter must be defined PER-RANK."]
[null,null,"Row 22 (RD Data %low) is the percentage of bits to toggle low each Read strobe edge. This is used to adjust I/O power accordingly."]
[null,null,"Row 23 (WRsch%) is the percentage of clocks that data is written to the DRAM. This would be equal to the average read bandwidth divided by peak read bandwidth.  This parameter must be defined PER-RANK."]
[null,null,"Row 24 (WR Data %low) is the percentage of bits to toggle low each Write strobe edge. This is used to adjust I/O power accordingly."]
[null,null,"Row 25 (termRDsch%) is the percentage of clock cycles the DRAM under investigation is terminating read data from another device. It does not include time when a different DRAM on the bus may be terminating data."]
[null,null,"Row 26 (termWRsch%) is the percentage of clock cycles the DRAM under investigation is terminating write data from another device. It does not include time when a different DRAM on the bus may be terminating data."]
[null,null,"Row 27 (Actual System tRC) is the tRC used by the system. This is needed because ACT+PRE power is calculated based on spec min tRC (IDD0), and if the system is using a longer tRC then derating this ACT+PRE power over the actual tRC window is required."]
[null,null,"Row 28 (tRRDsch) is the average time between ACT commands to the DRAM.  Under IDD0 this would be equal to tRC. If the DRAM is in interleaving bursts, it may be less than tRC. This value is now calculated off of page hit rate. Entering a number here will override the automatic calculation."]
[null,null,"On right side of page, input drivers' Zo, RTTs, and series resistors (module) values in dark green shaded areas. Default populated values are typical."]
[]
[null,"Power Calcs tab"]
[null,null,"No inputs are required for this tab. It contains some of the detail calculations that provide information into the Summary tab. It can be used as a reference for further understanding the calculator, or you may jump straight to the Summary page for the final answer."]
[]
[null,"Summary tab"]
[null,null,"No inputs are required for this tab. It contains a summary of the power used by the DRAM. The power is broken out between:\n  — Power to read/write data to and from the DRAM\n  — Power to activate the rows\n  — Background power for standby modes and refresh"]
[]
[null,"Module Calc Tab"]
[null,null,"This tab will calculate DIMM power based on the \"Summary\" tab and user-inputs for DIMM configuration *. User must select number of ranks, the DIMM type, and whether the DIMM has ECC (some UDIMM's/SODIMM's may or may not have ECC, while all RDIMMS/LRDIMMS do). If calculating a module using DDP components, make sure this is selected in \"DDR4 Config\", otherwise the calculation will be incorrect."]
[null,null,"* Note that not all DIMM configurations will be valid, and an warning message for invalid combinations may not be given. It is up to the user to make sure that these options are selected correctly for the DIMM they are interested in."]

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[]
[]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null," "," "]
[null,null,null,null,"4Gb","4Gb","4Gb","4Gb","4Gb","4Gb","4Gb","4Gb","4Gb","4Gb",null,"8Gb","8Gb","8Gb","8Gb","8Gb","8Gb","8Gb","8Gb","8Gb","8Gb",null,"16Gb","16Gb","16Gb","16Gb","16Gb","16Gb","16Gb","16Gb","16Gb","16Gb"]
[null,null,null,null,1866,2133,2133,2400,2400,2666,2666,2933,2933,3200,null,1866,2133,2133,2400,2400,2666,2666,2933,2933,3200,null,1866,2133,2133,2400,2400,2666,2666,2933,2933,3200]
[null,"Parameter","Condition",null,"-107E","-093","-093E","-083","-083E","-075","-075E","-068","-068E","-062E",null,"-107E","-093","-093E","-083","-083E","-075","-075E","-068","-068E","-062E",null,"-107E","-093","-093E","-083","-083E","-075","-075E","-068","-068E","-062E"]
[null,"VDD,max","Maximum VDD",null,1.26,1.26,1.26,1.26,1.26,1.26,1.26,1.26,1.26,1.26,null,1.26,1.26,1.26,1.26,1.26,1.26,1.26,1.26,1.26,1.26,null,1.26,1.26,1.26,1.26,1.26,1.26,1.26,1.26,1.26,1.26,"V"]
[null,"VDD,min","Minimum VDD",null,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,null,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,null,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,1.1399999999999999,"V"]
[null,"VPP,max","Maximum VPP",null,2.75,2.75,2.75,2.75,2.75,2.75,2.75,2.75,2.75,2.75,null,2.75,2.75,2.75,2.75,2.75,2.75,2.75,2.75,2.75,2.75,null,2.75,2.75,2.75,2.75,2.75,2.75,2.75,2.75,2.75,2.75,"V"]
[null,"VPP,min","Minimum VPP",null,2.375,2.375,2.375,2.375,2.375,2.375,2.375,2.375,2.375,2.375,null,2.375,2.375,2.375,2.375,2.375,2.375,2.375,2.375,2.375,2.375,null,2.375,2.375,2.375,2.375,2.375,2.375,2.375,2.375,2.375,2.375,"V"]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,"IDD5R/IPP5R"]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,"IDD5B/IPP5B"]
[null,"IDD0","Active Bank Precharge Current","x4",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x8",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x16",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,"IPP0","Word Line Boost Current","x4",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x8",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x16",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,"IDD2P","Maximum precharge power-down standby current","x4",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x8",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x16",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,"IDD2N","Maximum precharge standby current","x4",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x8",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x16",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,"IDD3P","Maximum active power-down standby current ","x4",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x8",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x16",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,"IDD3N","Maximum active standby current","x4",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x8",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x16",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,"IPP3N","Maximum standby Ipp current","x4",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x8",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x16",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,"IDD4R","Maximum read burst current","x4",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x8",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x16",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,"IPP4R","Maximum read burst current","x4",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x8",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x16",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,"IDD4W","Maximum write burst current","x4",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x8",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x16",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,"IPP4W","Maximum write burst current","x4",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x8",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x16",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,"IDD5R","Maximum distriuted refresh current","x4",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x8",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x16",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,"IPP5R","Maximum distriuted refresh current","x4",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x8",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[null,null,null,"x16",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"mA"]
[]
[null,null,"tCK used for current measurements (see current notes)",null,{"$f":"2000/E5-0.001","v":1.0708113612004289},{"$f":"2000/F5-0.001","v":0.93664650726676046},{"$f":"2000/G5-0.001","v":0.93664650726676046},{"$f":"2000/H5","v":0.83333333333333337},0.83333333333333337,0.75018754688672173,0.75018754688672173,0.68189566996249573,0.68189566996249573,0.625,null,{"$f":"2000/P5-0.001","v":1.0708113612004289},{"$f":"2000/Q5-0.001","v":0.93664650726676046},{"$f":"2000/R5-0.001","v":0.93664650726676046},{"$f":"2000/S5","v":0.83333333333333337},{"$f":"2000/T5","v":0.83333333333333337},0.75018754688672173,0.75018754688672173,{"$f":"2000/W5","v":0.68189566996249573},{"$f":"2000/X5","v":0.68189566996249573},{"$f":"2000/Y5","v":0.625},null,{"$f":"2000/AA5-0.001","v":1.0708113612004289},{"$f":"2000/AB5-0.001","v":0.93664650726676046},{"$f":"2000/AC5-0.001","v":0.93664650726676046},{"$f":"2000/AD5","v":0.83333333333333337},0.83333333333333337,0.75018754688672173,0.75018754688672173,0.68189566996249573,0.68189566996249573,0.625,"ns"]
[null,"tRRD_s","Minimum activate-to-activate timing (different bank, different BG)","x4",4.2,3.7,3.7,3.3,3.3,3,3,2.7,2.7,2.5,null,4.2,3.7,3.7,3.3,3.3,3,3,2.7,2.7,2.5,null,4.2,3.7,3.7,3.3,3.3,3,3,2.7,2.7,2.5,"ns"]
[null,null,null,"x8",4.2,3.7,3.7,3.3,3.3,3,3,2.7,2.7,2.5,null,4.2,3.7,3.7,3.3,3.3,3,3,2.7,2.7,2.5,null,4.2,3.7,3.7,3.3,3.3,3,3,2.7,2.7,2.5,"ns"]
[null,null,null,"x16",5.3,5.3,5.3,5.3,5.3,5.3,5.3,5.3,5.3,5.3,null,5.3,5.3,5.3,5.3,5.3,5.3,5.3,5.3,5.3,5.3,null,5.3,5.3,5.3,5.3,5.3,5.3,5.3,5.3,5.3,5.3,"ns"]
[null,"tRRD_L","Minimum activate-to-activate timing (different bank, same BG)","x4",5.3,5.3,5.3,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,null,5.3,5.3,5.3,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,null,5.3,5.3,5.3,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,"ns"]
[null,null,null,"x8",5.3,5.3,5.3,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,null,5.3,5.3,5.3,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,null,5.3,5.3,5.3,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,4.9000000000000004,"ns"]
[null,null,null,"x16",6.4,6.4,6.4,6.4,6.4,6.4,6.4,6.4,6.4,6.4,null,6.4,6.4,6.4,6.4,6.4,6.4,6.4,6.4,6.4,6.4,null,6.4,6.4,6.4,6.4,6.4,6.4,6.4,6.4,6.4,6.4,"ns"]
[null,"tRC","Minimum activate-to-activate timing (same bank)",null,47.9,48,47.06,46.16,45.32,46.16,45.5,46.32,45.64,45.75,null,47.9,48,47.06,46.16,45.32,46.25,46.16,46.32,45.64,45.75,null,47.9,48,47.06,46.16,45.32,46.16,45.5,46.32,45.64,45.75,"ns"]
[null,"tRAS","tRAS used for IDD0 calculation",null,34,33,33,32,32,32,32,32,32,32,null,34,33,33,32,32,32,32,32,32,32,null,34,33,33,32,32,32,32,32,32,32,"ns"]
[null,"tRFC (MIN)","Minimum refresh-to-refresh cycle time",null,260,260,260,260,260,260,260,260,260,260,null,350,350,350,350,350,350,350,350,350,350,null,350,350,350,350,350,350,350,350,350,350,"ns"]
[null,"tREFI","Average periodic refresh cycle time",null,7.8,7.8,7.8,7.8,7.8,7.8,7.8,7.8,7.8,7.8,null,7.8,7.8,7.8,7.8,7.8,7.8,7.8,7.8,7.8,7.8,null,7.8,7.8,7.8,7.8,7.8,7.8,7.8,7.8,7.8,7.8,"µs"]
[null,"tCK (MIN)","Minimum tCK cycle rate",null,{"$f":"E53","v":1.0708113612004289},0.93664650726676046,0.93664650726676046,0.83333333333333337,0.83333333333333337,0.75018754688672173,0.75018754688672173,0.68189566996249573,0.68189566996249573,0.625,null,{"$f":"P53","v":1.0708113612004289},{"$f":"Q53","v":0.93664650726676046},{"$f":"R53","v":0.93664650726676046},{"$f":"S53","v":0.83333333333333337},{"$f":"T53","v":0.83333333333333337},0.75018754688672173,0.75018754688672173,{"$f":"W53","v":0.68189566996249573},{"$f":"X53","v":0.68189566996249573},{"$f":"Y53","v":0.625},null,{"$f":"AA53","v":1.0708113612004289},0.93664650726676046,0.93664650726676046,0.83333333333333337,0.83333333333333337,0.75018754688672173,0.75018754688672173,0.68189566996249573,0.68189566996249573,0.625,"ns"]
[null,"tCK (MAX)","Maximum tCK cycle rate",null,1.9,1.9,1.9,1.9,1.9,1.9,1.9,1.9,1.9,1.9,null,1.9,1.9,1.9,1.9,1.9,1.9,1.9,1.9,1.9,1.9,null,1.9,1.9,1.9,1.9,1.9,1.9,1.9,1.9,1.9,1.9,"ns"]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null," "]
[]
[null,"                                         Do Not Go Below This Box                                                            Do Not Go Below This Box                                                           Do Not Go Below This Box                                                           Do Not Go Below This Box                                                             Do Not Go Below This Box                                                           Do Not Go Below This Box                                                           Do Not Go Below This Box                                                           Do Not Go Below This Box                  "]
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[]
[null,"Parameter","Condition"]
[null,"VDD,max","Maximum VDD",{"$f":"O71","v":1.26}]
[null,"VDD,min","Minimum VDD",{"$f":"O72","v":1.1399999999999999}]
[null,"VPP,max","Maximum VPP",{"$f":"O73","v":2.75}]
[null,"VPP,min","Minimum VPP",{"$f":"O74","v":2.375}]
[]
[null,"IDD0","Maximum Active Precharge Current",{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O78,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O77,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O76,\"error\")          )             )","v":0}]
[null,"IPP0","Maximum Active Word line Boost",{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O81,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O80,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O79,\"error\")          )             )","v":0}]
[null,"IDD2P","Maximum Precharge Power-Down Standby Current",{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O84,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O83,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O82,\"error\")          )             )","v":0}]
[null,"IDD2N","Maximum Precharge Standby Current",{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O87,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O86,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O85,\"error\")          )             )","v":0}]
[]
[null,"IDD3P","Maximum Active Power-Down Standby Current",{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O90,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O89,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O88,\"error\")          )             )","v":0}]
[null,"IDD3N","Maximum Active Standby Current",{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O93,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O92,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O91,\"error\")          )             )","v":0}]
[null,"IPPSB","Maximum Standby Word line Boost",{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O96,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O95,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O94,\"error\")          )             )","v":0}]
[null,"IDD4R","Maximum Read Burst Current",{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O99,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O98,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O97,\"error\")          )             )","v":0}]
[null,"IPP4R","Maximum Read Burst Current",{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O102,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O101,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O100,\"error\")          )             )","v":0}]
[null,"IDD4W","Maximum Write BurstCurrent",{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O105,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O104,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O103,\"error\")          )             )","v":0}]
[null,"IPP4W","Maximum Write BurstCurrent",{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O108,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O107,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O106,\"error\")          )             )","v":0}]
[null,{"$f":"B46","v":"IDD5R"},{"$f":"C46","v":"Maximum distriuted refresh current"},{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O111,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O110,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O109,\"error\")          )             )","v":0}]
[null,{"$f":"B49","v":"IPP5R"},{"$f":"C49","v":"Maximum distriuted refresh current"},{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O114,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O113,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O112,\"error\")          )             )","v":0}]
[]
[null,"tCKavg","tCK used for current measurements ",{"$f":"O117","v":0.625}]
[null,"tRRD_s","Minimum activate-to-activate timing (different BG)",{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O120,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O119,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O118,\"error\")          )             )","v":2.5}]
[null,"tRRD_L","Minimum activate-to-activate timing (same BG)",{"$f":"IF('DDR4 Config'!S1=3,'DDR4 Spec'!O123,    IF('DDR4 Config'!S1=2, 'DDR4 Spec'!O122,      IF('DDR4 Config'!S1=1, 'DDR4 Spec'!O121,\"error\")          )             )","v":4.9000000000000004}]
[null,"tRC","Minimum activate-to-activate timing (Same bank)",{"$f":"O124","v":45.75}]
[null,"tRAS","tRAS used for IDD0 Calcualtion",32]
[null,"tRFC(min)","Minimum refresh to refresh cycle time",350]
[null,"tREFI","Average periodic refresh cycle time",7.8]
[null,"tCK(min)","Minimum tCK cycle rate",0.625]
[null,"tCK(max)","Maximum tCK cycle rate",1.9]
[]
[]
[]
[null,"Initial numbers are for reference only and must be verified with existing DRAM data sheets for accuracy prior to using the spreadsheet."]

{"sheet":"DDR4 Config","index":4,"n_rows":48,"n_cols":23,"rows_kept":48,"cut":false,"hidden":false,"merged":[[4,1,4,4]]}
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,3,10," ",1,{"$f":"U1","v":1}," <==",1,2,{"$f":"V1","v":2}]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,"Density","Speed Grade","DBI","DBI","Strobes","DQs per DRAM","Config","Package","Package"]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,"4Gb",{"$f":"'DDR4 Spec'!E6","v":"-107E"},"Off",1,1,"x4",4,1,"SDP"]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,"8Gb",{"$f":"'DDR4 Spec'!F6","v":"-093"},"On",2,1,"x8",8,2,"DDP2R"]
[null,"DDR4 SDRAM Configuration",null,null,null,null,null,null,null,null,null,null,null,null,"16Gb",{"$f":"'DDR4 Spec'!G6","v":"-093E"},null,null,2,"x16",16]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"'DDR4 Spec'!H6","v":"-083"}]
[null,null,"DRAM Die Density",{"$f":"INDEX(O3:O5,O1)","v":"16Gb"},null,null,null,null,null,null,null,null,null,null,null,{"$f":"'DDR4 Spec'!I6","v":"-083E"}]
[null,"MT/s","DRAM Width (Number of DQs per )",{"$f":"INDEX(U3:U5,U1)","v":4},null,null,null,null,null,null,null,null,null,null,null,{"$f":"'DDR4 Spec'!J6","v":"-075"}]
[null,{"$f":"    IF('DDR4 Config'!D9 = \"-107E\", 1866, IF('DDR4 Config'!D9 = \"-093\", 2133, IF('DDR4 Config'!D9 = \"-093E\", 2133, IF('DDR4 Config'!D9 = \"-083\", 2400, IF('DDR4 Config'!D9 = \"-083E\", 2400, IF('DDR4 Config'!D9 = \"-075\", 2666, IF('DDR4 Config'!D9 = \"-075E\", 2666, IF('DDR4 Config'!D9 = \"-068\", 2933, IF('DDR4 Config'!D9 = \"-068E\",2933, IF('DDR4 Config'!D9 = \"-062E\", 3200, 0))))))))))","v":3200},"Speed Grade",{"$f":"INDEX(P3:P12,P1)","v":"-062E"},null,null,null,null,null,null,null,null,null,null,null,{"$f":"'DDR4 Spec'!K6","v":"-075E"}]
[null,null,"DBI Mode enabled",{"$f":"INDEX(R3:R5,R1)","v":1},null,null,null,null,null,null,null,null,null,null,null,{"$f":"'DDR4 Spec'!L6","v":"-068"}]
[null,null,"Package (only used for \"Module Calc\" tab)",{"$f":"INDEX(V3:V5,V1)","v":2},null,null,null,null,null,null,null,null,null,null,null,{"$f":"'DDR4 Spec'!M6","v":"-068E"}]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"'DDR4 Spec'!N6","v":"-062E"}]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null," "]
[null,"Parameter","Condition","Value","Units",null,null,null,null,null,null,null,null,null,null," "]
[null,null,"Maximum VCC",{"$f":"'DDR4 Spec'!D132","v":1.26},"V"]
[null,null,"Minimum VCC",{"$f":"'DDR4 Spec'!D133","v":1.1399999999999999},"V"]
[null,null,"Maximum VPP",{"$f":"'DDR4 Spec'!D134","v":2.75},"V"]
[null,null,"Minimum VPP",{"$f":"'DDR4 Spec'!D135","v":2.375},"V"]
[]
[null,null,"Number of DQ strobes (DQS) per DRAM",{"$f":"2*INDEX(S3:S5,S1)","v":2}]
[null,null,"Number of data mask (DM) per DRAM",{"$f":"INDEX(S3:S5,S1)","v":1},null,null,null,null,null,null,null,null,null,null,null,null,null,null," "]
[]
[null,"IDD0","Maximum VDD active precharge current",{"$f":"'DDR4 Spec'!D137","v":0},"mA"]
[null,"IPP0","Maximum VPP active precharge current",{"$f":"'DDR4 Spec'!D138","v":0},"mA"]
[null,"IDD2P","Maximum precharge power-down standby current",{"$f":"'DDR4 Spec'!D139","v":0},"mA"]
[null,"IDD2N","Maximum precharge standby current",{"$f":"'DDR4 Spec'!D140","v":0},"mA"]
[null,"IDD3P","Maximum active power-down standby current",{"$f":"'DDR4 Spec'!D142","v":0},"mA"]
[null,"IDD3N","Maximum active standby current",{"$f":"'DDR4 Spec'!D143","v":0},"mA"]
[null,"IDD3N_1BNK","Maximum active standby current with one bank open (Calculated)",{"$f":"(D28-D26)/IF(D8=16,8,16)+D26","v":0},"mA"]
[null,"IPP3N","Maximum VPP standby current",{"$f":"'DDR4 Spec'!D144","v":0},"mA"]
[null,"IDD4R","Maximum read burst current",{"$f":"'DDR4 Spec'!D145","v":0},"mA"]
[null,"IPP4R","Maximum VPP read burst current",{"$f":"'DDR4 Spec'!D146","v":0},"mA"]
[null,"IDD4W","Maximum write burst current",{"$f":"'DDR4 Spec'!D147","v":0},"mA"]
[null,"IPP4W","Maximum VPP write burst current",{"$f":"'DDR4 Spec'!D148","v":0},"mA"]
[null,"IDD5R","Maximum distributed refresh current",{"$f":"'DDR4 Spec'!D149","v":0},"mA"]
[null,"IPP5R","Maximum distributed refresh Ipp current",{"$f":"'DDR4 Spec'!D150","v":0},"mA"]
[null,"IDD5B","Maximum burst refresh current (calculated from IDD5R",{"$f":"(D35-D26)*((D46*1000)/D45)+D26","v":0},"mA"]
[null,"IPP5B","Maximum burst refresh Ipp current (calculated from IDD5R)",{"$f":"(D36-D30)*((D46*1000)/D45)+D30","v":0},"mA"]
[]
[null,"tCKavg","tCK used for current measurements (see current notes)",{"$f":"'DDR4 Spec'!D152","v":0.625},"ns"]
[null,"tRRD_S","Minimum activate-to-activate timing (different BG)",{"$f":"'DDR4 Spec'!D153","v":2.5},"ns"]
[null,"tRRD_L","Minimum activate-to-activate timing (same BG)",{"$f":"'DDR4 Spec'!D154","v":4.9000000000000004},"ns",null,null,null,null,null,null,null,null,null,null," "]
[null,"tRC","Spec minimum activate-to-activate timing (same bank)",{"$f":"'DDR4 Spec'!D155","v":45.75},"ns"]
[null,"tRAS","tRAS used for IDD0 calculation",{"$f":"'DDR4 Spec'!D156","v":32},"ns"]
[null,"tRFC (MIN)","Spec minimum refresh-to-refresh cycle time",{"$f":"'DDR4 Spec'!D157","v":350},"ns"]
[null,"tREFI","Average periodic refresh cycle time",{"$f":"'DDR4 Spec'!D158","v":7.8},"µs"]
[null,"tCK (MIN)","Minimum tCK cycle rate",{"$f":"'DDR4 Spec'!D159","v":0.625},"ns"]
[null,"tCK (MAX)","Maximum tCK cycle rate",{"$f":"'DDR4 Spec'!D160","v":1.9},"ns"]

{"sheet":"System Config","index":5,"n_rows":40,"n_cols":56,"rows_kept":40,"cut":false,"hidden":false,"merged":[[14,8,14,9],[29,12,29,13],[3,12,3,15],[4,12,4,15],[3,17,3,32],[28,12,28,13],[7,9,9,10],[34,12,34,13],[4,17,4,24],[4,25,4,32],[11,15,12,15],[13,15,14,15],[22,17,22,32],[23,17,23,32],[7,2,7,3],[1,2,1,3],[12,8,13,9],[2,2,2,3],[6,2,6,3]]}
[null,null,null,null,null,null,null,null,null,null,null,null,null," "," "," ",null,null,null,null,null,null,null,2,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,1,7,3,8]
[null,null,2,null,null,null,null,null,null,null,null,null,"DRAM Usage Conditions in the System Environment",null,null,null,null,null,null,null,null,null,null,null,null,null," ",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"I/O driver","RTTu2-RD","ODT write","RTTu2-WR"]
[null,1,"Google Stress 4Rx4 (DDP2R) LRDIMM",null,null,null,null,null,null,null,null,null,null," ",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,34,34,80,34]
[null,2,"Google Stress 2Rx4/2Rx8 RDIMM/UDIMM/SODIMM",null,null,null,null,null,null,null,null,null,"Values that require input are shown in dark green. These will be dependent on how the system accesses the DRAM.",null,null,null,null,"Values that require input are shown in white field or in drop box. These will be dependent on how the system accesses the DRAM.",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,48,40,120,40]
[null,3,"Google Stress 1Rx4/1Rx8 RDIMM/UDIMM/SODIMM",null,null,null,null,null,null,null,null,null,"Calculated values in light green; do not make entries in these slots",null,null,null,null,"READ  I/O  Power",null,null,null,null,null,null,null,"WRITE  I/O  Power",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null," ",48,240,48]
[null,4,"Google Stress 1Rx16 UDIMM/SODIMM",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null," ",60," ",60]
[null,5,"User-Defined",null,null,null,null,null,null,null,null,null,"System VDD",1.2,"V",{"$f":"IF(N7<'DDR4 Config'!D16,\"ERROR, VCC too Low\",IF(N7>'DDR4 Config'!D15,\"ERROR, VCC too High\",\"\"))","v":""},null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null," ",80," ",80]
[null,null,null,null,null,null,null,null,null,"CLK default can be written over, Spare formula ->",null,null,"System VPP",2.5,"V",{"$f":"IF(N8<'DDR4 Config'!D18,\"ERROR, VPP too Low\",IF(N8>'DDR4 Config'!D17,\"ERROR, VPP too High\",\"\"))","v":""},null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null," ",120," ",120]
[null,null,null,null,null,null,null,null,null,null,null,{"$f":"IF('DDR4 Config'!D9 = \"-107E\", 1000000/1071, IF('DDR4 Config'!D9 = \"-093\", 1000000/937, IF('DDR4 Config'!D9 = \"-093E\", 1000000/937, IF('DDR4 Config'!D9 = \"-083\", 1000000/833, IF('DDR4 Config'!D9 = \"-083E\", 1000000/833, IF('DDR4 Config'!D9 = \"-075\", 1000000/750, IF('DDR4 Config'!D9 = \"-075E\", 1000000/750, IF('DDR4 Config'!D9 = \"-068\", 1000000/682, IF('DDR4 Config'!D9 = \"-068E\", 1000000/682, IF('DDR4 Config'!D9 = \"-062E\", 1000000/625, 0))))))))))","v":1600},"System CK frequency (data rate /2)",{"$f":"IF('DDR4 Config'!D9 = \"-107E\", 1000000/1071, IF('DDR4 Config'!D9 = \"-093\", 1000000/937, IF('DDR4 Config'!D9 = \"-093E\", 1000000/937, IF('DDR4 Config'!D9 = \"-083\", 1000000/833, IF('DDR4 Config'!D9 = \"-083E\", 1000000/833, IF('DDR4 Config'!D9 = \"-075\", 1000000/750, IF('DDR4 Config'!D9 = \"-075E\", 1000000/750, IF('DDR4 Config'!D9 = \"-068\", 1000000/682, IF('DDR4 Config'!D9 = \"-068E\", 1000000/682, IF('DDR4 Config'!D9 = \"-062E\", 1000000/625, 0))))))))))","v":1600},"MHz",{"$f":"IF(N9+0.1<1000/'DDR4 Config'!D48,\"ERROR, frequency too low\",IF(N9-0.5> 1000 /'DDR4 Config'!D47,\"ERROR, frequency too high\",               IF('DDR4 Config'!D9 = \"-107E\",\"DDR4-1866 Base\", IF('DDR4 Config'!D9 = \"-093\", \"DDR4-2133  Base\", IF('DDR4 Config'!D9 = \"-093E\", \"DDR4-2133  Base\", IF('DDR4 Config'!D9 = \"-083\", \"DDR4-2400  Base\", IF('DDR4 Config'!D9 = \"-083E\",  \"DDR4-2400  Base\", IF('DDR4 Config'!D9 = \"-075\",  \"DDR4-2666  Base\", IF('DDR4 Config'!D9 = \"-075E\",  \"DDR4-2666  Base\", IF('DDR4 Config'!D9 = \"-068\",  \"DDR4-2933  Base\", IF('DDR4 Config'!D9 = \"-068E\",\"DDR4-2933  Base\", IF('DDR4 Config'!D9 = \"-062E\",  \"DDR4-3200  Base\", \" K\"))))))))))          ))","v":"DDR4-3200  Base"},null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null," ",240," ",240]
[null,null,null,null,null,null,null,null,null,null,null," ","Burst length",8,null,"must be either BC 4 or BL8 ",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null," ",0,null,0]
[]
[null,null,null,null,null,null,null,null,null,null,null,"PdqRD","DDR4 SDRAM output power per individual DQ on this DRAM during READs from this DRAM",{"$f":"IF(V20= \"na\",0, V20) +IF(V21= \"na\",0, V21)","v":8.5576695389234096},"mW","This value is the DRAM I/O power plus module series resistor power per DQ.   The calculator to the right will estimate and populate the entries to the left "]
[null,null,null,null,null,null,null,null,"Select DIMM usage conditions or user-defined conditions from drop-down box below.            GS conditions are for 1DPC only",null,null,"PdqWR","DDR4 SDRAM termination power per individual DQ during WRITEs to this DRAM",{"$f":"IF(AD20= \"na\",0, AD20) +IF(AD21= \"na\",0, AD21)","v":4.3964990840626905},"mW"]
[null,null,null,null,null,null,null,null,null,null,null,"PdqRDoth","DDR4 SDRAM termination power per individual DQ during READs from other DRAM Rank*",{"$f":"IF( X15 = 0, 0,X20+  X21)","v":1.1968506010703013},"mW","This value is the termination power plus module series resistor power per DQ.   The calculator to the right will estimate and populate the entries to the left",null,null,"Enter values in dark blue boxes below",null,null,null,null,"0 = Disabled",null,null,"Enter values in dark blue boxes below",null,null,null,null,"0 = Disabled",null,null,"IRZC",{"$f":"1*AB19/AB15","v":4.1522491349480974},null,"IRTTpu1",{"$f":"1000*((AB17-0.001*AD19)/AD15)","v":4.1522491349480966},null,"IRTTpu1",{"$f":"1000*((AB17-0.001*AF19)/AF15)","v":{"$error":"#DIV/0!"}}]
[null,null,null,null,null,null,null,null,null,null,null,"PdqWRoth","DDR4 SDRAM termination power per individual DQ during WRITEs to other DRAM Rank*",{"$f":"IF( AF15 = 0, 0,AF20+  AF21)","v":0},"mW",null,null,null,"RTTuC=",50,"  Rz1=",{"$f":"INDEX(BA3:BA4,BA1)","v":34},"RTTu2=",{"$f":"INDEX(BB3:BB11,BB1)","v":240},null," ","RzC=",34,"  RTTu1=",{"$f":"INDEX(BC3:BC5,BC1)","v":240},"  RTTu2=",{"$f":"INDEX(BD3:BD11,BD1)","v":0},null,null,null,null,null,"IRTTpd1",{"$f":"1*AD19/AD16","v":13.564013840830452},null,"IRTTpd1",{"$f":"1*AF19/AF16","v":0}]
[null,"Google Stress 4Rx4 (DDP2R) LRDIMM","Google Stress 2RX4/2Rx8 RDIMM","Google Stress 1Rx4/1Rx8 RDIMM","Google Stress 1RX16 UDIMM/SODIMM","Enter User Defined Usage conditions ->",null,null,{"$f":"INDEX($B16:$G16,1,$C$2)","v":"Google Stress 2RX4/2Rx8 RDIMM"},"User Defined Usage Conditions",null,null,null,{"$f":"IF($C$2=5,J16,I16)","v":"Google Stress 2RX4/2Rx8 RDIMM"}," ","<- Pulled from DIMM usage conditions table to the left",null,null,null,null,"  Rs1=",15,"Rs2=",15,null,null,null,null,"  Rs1=",{"$f":"V16","v":15},"  Rs2=",{"$f":"X16","v":15},null,null,null,null,null,"IRS1",{"$f":"1*(AD19-AB19)/AD17","v":{"$error":"#DIV/0!"}},null,"IRS1",{"$f":"1*(AF19-AB19)/AF17","v":{"$error":"#DIV/0!"}}]
[null,4.8000000000000001E-2,4.8000000000000001E-2,4.8000000000000001E-2,4.8000000000000001E-2,"-",null,null,{"$f":"INDEX($B17:$G17,1,$C$2)","v":4.8000000000000001E-2},null,null,"BNK_PRE%","The percentage of time that all banks on the DRAM are in a precharged state (per RANK)",{"$f":"IF($C$2=5,J17,I17)","v":4.8000000000000001E-2}," ",{"$f":"IF(SUM(N21+N23)*8/N10>1,\"Data Bus utilization is too high\",\"\")","v":""},null,null,"VDDq=",1.2,null,null,null,null,null,null,"VDDq=",{"$f":"T17","v":1.2}]
[null,0,0,0,0,"-",null,null,{"$f":"INDEX($B18:$G18,1,$C$2)","v":0},null,null,"CKE_LO_PRE%","The percentage of the all bank precharge time for which CKE is held LOW",{"$f":"IF($C$2=5,J18,I18)","v":0}," ",null,null,null,"Calculated values in green boxes below",null,null,null,null,null,null,null,"Calculated values in green boxes below"]
[null,0,0,0,0,"-",null,null,{"$f":"INDEX($B19:$G19,1,$C$2)","v":0},null,null,"CKE_LO_ACT%","The percentage of the at least one bank active time for which CKE is held LOW",{"$f":"IF($C$2=5,J19,I19)","v":0}," ",{"$f":"IF(1-N19<N21+N23,\"ERROR, CKE HI must be greater than READ and WRITE output cycles\",\"\")","v":""},null,null,"N3=      (mV)  ",{"$f":"IF(X15>0,  IF(V15>0,   IF(T15>0,   1000*    (T17 *(V15+V16) )/(V15+V16+((X15+X16)* T15)/(X15+X16+ T15)),\"RTTC<1\"),\"Rz1<1\"),                                                                                                                                                              IF(V15>0,   IF(T15>0,   1000*    (T17 *(V15+V16) )/(V15+V16+T15),\"RTTC<1\"),\"Rz1<1\"))","v":647.5537100559668},"N1=      (mV)  ",{"$f":"  IF(X15>0,     IF(T15>0,     IF(V15>0,   1000*    (T17 *V15 )/(V15+V16+((X15+X16)* T15)/(X15+X16+ T15)),\"RZ<1\"), T15/T15),  IF(T15>0,           IF(V15>0,   1000*    (T17 *V15 )/(V15+V16+T15),\"RZ<1\"), T15/T15))","v":449.3229824878137},"N2=      (mV)  ",{"$f":" IF(V15>0,             IF(X15>0,  1000* (T19*0.001+ (T17-T19*0.001)*X16/(X15+X16)),0), \"RZ<1\")","v":680.05055064091005},null,null,"N3=      (mV)  ",{"$f":"  IF(AD15>0,               IF(AF15>0, IF(AB15>0,1000*AB17*AB15/(AB15+(AD15+AD16)*(AF15+AF16)/(AD15+AD16+AF15+AF16)),\"RZc<1\"),  IF(AB15>0,1000*AB17*AB15/(AB15+AD15+AD16), \"RZc<1\" ) ),    \" Rtt1<1\")","v":141.1764705882353},"N1=      (mV)  ",{"$f":"IF(AD15>0,   AB19+(1000*AB17-AB19)*AD16/(AD15+AD16),\"Rtt1<1\")","v":203.46020761245677},"N2=      (mV)  ",{"$f":" IF(AD15>0,        IF(AF15>0,   AB19+(1000*AB17-AB19)*AF16/(AF15+AF16),0),\"Rtt1<1\")","v":0}]
[null,0,0,0,0,"-",null,null,0,null,null,"PH%","Page hit rate",0," ",null,null,null,"RTTPUC =   (mW)",{"$f":" IF(V15>0,            IF(T15>0, 0.001*(1000*T17 - T19)*(1000*T17 - T19)/T15,\"RTTC<1\"), \"RZ1<1\")","v":6.1039380654585367},"Rz =   (mW)",{"$f":" IF(X15>0,       IF(T15>0,     IF(V15>0,   1000*  (  (T17 *V15 )/(V15+V16+((X15+X16)* T15)/(X15+X16+ T15))   )* (  (T17 *V15 )/(V15+V16+((X15+X16)* T15)/(X15+X16+ T15)))/ V15,\"RZ<1\"), T15/T15),   IF(T15>0,     IF(V15>0,   1000*  ((T17 *V15 )/(V15+V16+ T15)   *      (T17 *V15 )/(V15+V16+ T15)  / V15),\"RZ<1\"), T15/T15))","v":5.9379747821101203},"RTTd2 =   (mW)",{"$f":" IF(V15>0,              IF(X15>0,  1000*                 ((T17-T19*0.001)*X15/(X15+X16))    *  ((T17-T19*0.001)*X15/(X15+X16))/X15,0), \"RZ<1\")","v":1.1264476245367541},null,null,"RzC =   (mW)",{"$f":"  IF(AD15>0,       IF(AB15>0,         0.001*  (AB19/(AB15)) * (AB19/(AB15))    *AB15, \"RZc<1\"), \"Rtt1<1\")","v":0.58619987787502559},"RTTPUd1 =   (mW)",{"$f":"IF(AD15>0,1000*((AB17-0.001*AD19 )*(AB17-0.001*AD19)/AD15),\"Rtt1<1\")","v":4.1378814908825321},"RTTPUd2 =   (mW)",{"$f":"IF(AD15>0,IF(AF15>0,1000*((AB17-0.001*AF19 )*(AB17-0.001*AF19)/AF15),0),\"Rtt1<1\")","v":0}]
[null,0.15,0.27,0.46,0.32,"-",null,null,0.27,null,null,"RDsch%","The percentage of clock cycles which are outputting read data from the DRAM (per RANK)",0.27," ",{"$f":"IF(SUM(N21+N23)*8/N10>1,\"Data Bus utilization is too high\",\"\")","v":""},null,null,null,null,"Rs1 =   (mW)",{"$f":"IF(V15>0,IF(V16>0,1000*(T19*0.001/(V15+V16))*(T19*0.001/(V15+V16))*V16,0),\"Rz<1\")","v":2.6196947568132889},"Rs2=   (mW)",{"$f":" IF(V15>0,            IF(X15>0, IF(X16>0, 1000*    ((T17-T19*0.001)*X16/(X15+X16))    *  ((T17-T19*0.001)*X16/(X15+X16))/X16,0),\"NoRTT2\"), \"RZ<1\")","v":7.0402976533547129E-2},null,null,null,null,"Rs1=   (mW)",{"$f":"  IF(AD15>0,IF(AD16>0,1000*((0.001*AD19-0.001*AB19)*(0.001*AD19-0.001*AB19)/AD16),0), \"Rtt1<1\")","v":0.25861759318015837},"Rs2=      (mW)",{"$f":"IF(AD15>0,IF(AF15>0,IF(AF16>0,1000*((0.001*AF19-0.001*AB19)*(0.001*AF19-0.001*AB19)/AF16),0),\"NoRTT2\"),\"Rtt1<1\")","v":"NoRTT2"}]
[null,0.5,0.5,0.5,0.5,"-",null,null,0.5,null,null,"RD Data % low","Percentage of bits to toggle low each Read strobe edge",0.5,null,"Adjust accordingly; suggest using 50%"]
[null,7.0000000000000007E-2,0.13,0.22,0.15,"-",null,null,0.13,null,null,"WRsch%","The percentage of clock cycles which are inputting write data to the DRAM (per RANK)",0.13," ",{"$f":"IF(SUM(N21+N23)*8/N10>1,\"Data Bus utilization is too high\",\"\")","v":""}]
[null,0.5,0.5,0.5,0.5,"-",null,null,0.5,null,null,"WR Data % low","Percentage of bits to toggle low each Write strobe edge",0.5,null,"Adjust accordingly; suggest using 50%"]
[null,0.15,0.27,0,0,"-",null,null,0.27,null,null,"termRDsch%","The percentage of clock cycles which are terminating read data to another DRAM Rank*",0.27," ","* must be 0% for a 1-rank system"]
[null,7.0000000000000007E-2,0.13,0,0,"-",null,null,0.13,null,null,"termWRsch%","The percentage of clock cycles which are terminating write data to another DRAM Rank*",0.13," ","* must be 0% for a 1-rank system",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null," "]
[null,124,124,124,124,"-",null,null,124,null,null,"System tRC","Actual system tRC",{"$f":"IF($C$2=5,J27,I27)","v":124},"ns","Needed to derate ACT power (calculated from JEDEC IDD0/3N/2N patterns which use spec min tRC)"]
[null,null,null,null,null,null,null,null,null,null,null,"tRRDsch*","The average time between ACT commands to this DRAM (includes ACT to same or different banks in the same DRAM device)",{"$f":"INT(N40*10000/N9)/10","v":6.2},"ns","This time is calculated from page hit rate read/write bus utilization. No entry is necessary."]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null," "]
[]
[]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null," ",null," "]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null," "]
[]
[null,null,null,null,null,null,null,null,null,null,null,null,"Calculated values in light green; do not make entries in these slots"]
[null,null,null,null,null,null,null,null,null,null,null," "]
[]
[]
[null,null,null,null,null,null,null,null,null,null,null,null,"Average clocks between colum",{"$f":"N10/2/(N23+N21)","v":10}]
[null,null,null,null,null,null,null,null,null,null,null,null,"Average Clocks between Rows",{"$f":"N39/(1-N20)","v":10}]

{"sheet":"Power Calcs","index":6,"n_rows":36,"n_cols":19,"rows_kept":36,"cut":false,"hidden":false,"merged":[[27,11,27,12],[27,17,27,18]]}
[]
[]
[]
[]
[null,{"$f":"CONCATENATE(\"System Derating for \",E34,\"Gb\",\" DDR4 SDRAM (x\",E35,\", \",E36,\" Speed Grade)\", \",\",\" \", IF( 'DDR4 Config'!D$10= 1, \"DBI not enabled\", IF('DDR4 Config'!D$10=2, \"DBI enabled\", \"DBI selection is wrong\")))","v":"System Derating for 32Gb DDR4 SDRAM (x4, -062E Speed Grade), DBI not enabled"}]
[null,null,null,null,null,null,null,null," "]
[null,"Power is calculated after after scaling for VDD.  Next, some powers are scaled for frequency effects to derate from test condition to use condition.  Finally, these numbers are scaled for actual system usage. All parameters are calculated and require no user input. See TN-40-07 for detailed explanations and formulas for each of these parameters"]
[null,null," "]
[]
[null,null,"Maximum Power Based on Data Sheet Test Conditions and Maximum Limits when in this state",null,null,null,null,null,"Power Derated for System Usage Conditions Input into This Model",null,null,null,null,null,"Power Scaled for Actual System Conditions (DRAM Usage, CK Frequency, and VCC)"]
[null,null,"Parameter","VDD","VPP","Total",null,null,"Parameter","VDD","VPP","Total",null,null,"Parameter","VDD","VPP","Total"]
[null,"Background power used during precharge power-down","Pds(PRE_PDN)",{"$f":"+'DDR4 Config'!D25*'DDR4 Config'!D$15","v":0},{"$f":" +'DDR4 Config'!D30*'DDR4 Config'!D$17","v":0},{"$f":"D12+E12","v":0},"mW",null,"Psch(PRE_PDN)",{"$f":"D12*'System Config'!N17*'System Config'!N18","v":0},{"$f":"E12*'System Config'!N17*'System Config'!N18","v":0},{"$f":"F12*'System Config'!N17*'System Config'!N18","v":0},"mW",null,"Psys(PRE_PDN)",{"$f":"      J12         * 'System Config'!N7 /'DDR4 Config'!D15","v":0},{"$f":"      K12   * 'System Config'!N8 /'DDR4 Config'!D17","v":0},{"$f":"P12+Q12","v":0},"mW"]
[null,"Background power used during idle standby","Pds(PRE_STBY)",{"$f":"+'DDR4 Config'!D26*'DDR4 Config'!D$15","v":0},{"$f":"+'DDR4 Config'!D30*'DDR4 Config'!D$17","v":0},{"$f":"D13+E13","v":0},"mW",null,"Psch(PRE_STBY)",{"$f":"D13*'System Config'!N17*(1-'System Config'!N18)","v":0},{"$f":"E13*'System Config'!N17*(1-'System Config'!N18)","v":0},{"$f":"F13*'System Config'!N17*(1-'System Config'!N18)","v":0},"mW",null,"Psys(PRE_STBY)",{"$f":"  J13         * 'System Config'!N7 /'DDR4 Config'!D15    *   'System Config'!N$9/1000*'DDR4 Config'!D$40","v":0},{"$f":"K13  * 'System Config'!N8 /'DDR4 Config'!D17    *   'System Config'!N$9/1000*'DDR4 Config'!D$40","v":0},0,"mW"]
[null,"Background power used during active power-down","Pds(ACT_PDN)",{"$f":"+'DDR4 Config'!D27*'DDR4 Config'!D$15","v":0},{"$f":" +'DDR4 Config'!D30*'DDR4 Config'!D$17","v":0},0,"mW",null,"Psch(ACT_PDN)",{"$f":"D14*(1-'System Config'!N17)*'System Config'!N19","v":0},{"$f":"E14*(1-'System Config'!N17)*'System Config'!N19","v":0},{"$f":"F14*(1-'System Config'!N17)*'System Config'!N19","v":0},"mW",null,"Psys(ACT_PDN)",{"$f":"J14*'System Config'!N7/'DDR4 Config'!D15*'System Config'!N$9/1000*'DDR4 Config'!D$40","v":0},{"$f":" K14  * 'System Config'!N8 /'DDR4 Config'!D17   *'System Config'!N$9/1000*'DDR4 Config'!D$40","v":0},0,"mW"]
[null,"Background power used during active standby","Pds(ACT_STBY)",{"$f":"+'DDR4 Config'!D28*'DDR4 Config'!D$15","v":0},{"$f":"  +'DDR4 Config'!D30*'DDR4 Config'!D$17","v":0},0,"mW",null,"Psch(ACT_STBY)",{"$f":"D15*(1-'System Config'!N17)*(1-'System Config'!N19)","v":0},{"$f":"E15*(1-'System Config'!N17)*(1-'System Config'!N19)","v":0},{"$f":"F15*(1-'System Config'!N17)*(1-'System Config'!N19)","v":0},"mW",null,"Psys(ACT_STBY)",{"$f":"J15*'System Config'!N7/'DDR4 Config'!D15*'System Config'!N$9/1000*'DDR4 Config'!D$40","v":0},{"$f":" K15  * 'System Config'!N8 /'DDR4 Config'!D17 *'System Config'!N$9/1000*'DDR4 Config'!D$40","v":0},0,"mW"]
[null,"Refresh power","Pds(REF)",{"$f":"('DDR4 Config'!D37-'DDR4 Config'!D28)*'DDR4 Config'!D15","v":0},{"$f":" + ( ('DDR4 Config'!D37 -'DDR4 Config'!D30)*'DDR4 Config'!D45/'DDR4 Config'!D46/1000)*'DDR4 Config'!D17","v":0},0,"mW",null,"Psch(REF)",{"$f":"D16*'DDR4 Config'!D45/('DDR4 Config'!D46*1000)","v":0},{"$f":"E16*'DDR4 Config'!D45/('DDR4 Config'!D46*1000)","v":0},{"$f":"F16","v":0},"mW",null,"Psys(REF)",{"$f":"J16*'System Config'!N7/'DDR4 Config'!D15","v":0},{"$f":" K16  * 'System Config'!N8 /'DDR4 Config'!D17","v":0},0,"mW"]
[null,"DRAM power for ACT/PRE commands","Pds(ACT)",{"$f":"('DDR4 Config'!D23-('DDR4 Config'!D29*'DDR4 Config'!D44/'DDR4 Config'!D43+'DDR4 Config'!D26*('DDR4 Config'!D43-'DDR4 Config'!D44)/'DDR4 Config'!D43))*'DDR4 Config'!D$15","v":0},{"$f":"IF('DDR4 Config'!D24> 'DDR4 Config'!D30,          ('DDR4 Config'!D24-('DDR4 Config'!D30*'DDR4 Config'!D44/'DDR4 Config'!D43+'DDR4 Config'!D30*('DDR4 Config'!D43-'DDR4 Config'!D44)/'DDR4 Config'!D43))*'DDR4 Config'!D$15,    ('DDR4 Config'!D24-('DDR4 Config'!D30  *(0.8)  *'DDR4 Config'!D44/'DDR4 Config'!D43+'DDR4 Config'!D30  *(0.8)  *('DDR4 Config'!D43-'DDR4 Config'!D44)/'DDR4 Config'!D43))*'DDR4 Config'!D$15)","v":0},0,"mW",null,"Psch(ACT)",{"$f":"+D17*('System Config'!N27/'System Config'!N28)*('DDR4 Config'!D43/'System Config'!N27)","v":0},{"$f":"+E17*'DDR4 Config'!D43/'System Config'!N28","v":0},{"$f":"+F17*'DDR4 Config'!D43/'System Config'!N28","v":0},"mW",null,"Psys(ACT)",{"$f":"J17*'System Config'!N7/'DDR4 Config'!D15","v":0},{"$f":" K17  * 'System Config'!N8 /'DDR4 Config'!D17","v":0},0,"mW"]
[null,"DRAM write power","Pds(WR)",{"$f":"    ('DDR4 Config'!D33-'DDR4 Config'!D$28)*'DDR4 Config'!D$15*'System Config'!N10/8","v":0},{"$f":"     IF(  ('DDR4 Config'!D32-'DDR4 Config'!D$30)>0,  'DDR4 Config'!D32-'DDR4 Config'!D$30, 0) *'DDR4 Config'!D$17*'System Config'!N10/8","v":0},0,"mW",null,"Psch(WR)",{"$f":"+D18*'System Config'!N23","v":0},{"$f":"+E18*'System Config'!N23","v":0},{"$f":"+F18*'System Config'!N23","v":0},"mW",null,"Psys(WR)",{"$f":"J18*'System Config'!N7/'DDR4 Config'!D15 *'System Config'!N$9/1000*'DDR4 Config'!D$40","v":0},{"$f":"K18*'System Config'!N7/'DDR4 Config'!D15 *'System Config'!N$9/1000*'DDR4 Config'!D$40","v":0},0,"mW"]
[null,"DRAM read power","Pds(RD)",{"$f":"+('DDR4 Config'!D31-'DDR4 Config'!D$28)*'DDR4 Config'!D$15*'System Config'!N10/8","v":0},{"$f":"     IF(  ('DDR4 Config'!D34-'DDR4 Config'!D$30)>0,  'DDR4 Config'!D34-'DDR4 Config'!D$30, 0) *'DDR4 Config'!D$17*'System Config'!N10/8","v":0},0,"mW",null,"Psch(RD)",{"$f":"+D19*'System Config'!N21","v":0},{"$f":"+E19*'System Config'!N21","v":0},{"$f":"+F19*'System Config'!N21","v":0},"mW",null,"Psys(RD)",{"$f":"J19*'System Config'!N7/'DDR4 Config'!D15 *'System Config'!N$9/1000*'DDR4 Config'!D$40","v":0},{"$f":"K19*'System Config'!N7/'DDR4 Config'!D15 *'System Config'!N$9/1000*'DDR4 Config'!D$40","v":0},0,"mW"]
[null,"DQ output driver power when driving data bus during READ","Pds(DQ)",{"$f":"IF('DDR4 Config'!D$10 = 1,'System Config'!N12*('DDR4 Config'!D$8+'DDR4 Config'!D20),  IF('DDR4 Config'!D$10 = 2,'System Config'!N12*(('DDR4 Config'!D$8+1)/2+'DDR4 Config'!D20),    \"error\"))","v":51.346017233540458},0,51.346017233540458,"mW",null,"Psch(DQ)",{"$f":"+D20*'System Config'!N21*'System Config'!N22","v":6.9317123265279621},{"$f":"+E20*'System Config'!N21","v":0},{"$f":"+F20*'System Config'!N21","v":13.863424653055924},"mW",null,"Psys(DQ)",{"$f":"J20","v":6.9317123265279621},{"$f":"K20","v":0},6.9317123265279621,"mW"]
[null,"Term power for writes","Pds(termW)",{"$f":"IF( 'DDR4 Config'!D$10 =1, ('System Config'!N13*('DDR4 Config'!D$8+'DDR4 Config'!D$20+'DDR4 Config'!D$21)), IF( 'DDR4 Config'!D$10 =2,('System Config'!N13*(('DDR4 Config'!D$8+1)/2+'DDR4 Config'!D$20+'DDR4 Config'!D$21)), \"error\"))","v":30.775493588438835},0,30.775493588438835,"mW",null,"Psch(termW)",{"$f":"+D21*'System Config'!N23*'System Config'!N24","v":2.0004070832485241},{"$f":"+E21*'System Config'!N23","v":0},{"$f":"+F21*'System Config'!N23","v":4.0008141664970482},"mW",null,"Psys(termW)",{"$f":"J21","v":2.0004070832485241},0,2.0004070832485241,"mW"]
[null,"Term power for reads from another rank","Pds(termRoth)",{"$f":"  IF('DDR4 Config'!D$10=1,('DDR4 Config'!D$15/'System Config'!N7)* ('System Config'!N14*('DDR4 Config'!D$8+'DDR4 Config'!D$20)),   IF('DDR4 Config'!D$10=2, ('DDR4 Config'!D$15/'System Config'!N7)*  ('System Config'!N14*('DDR4 Config'!D$8+1+'DDR4 Config'!D$20)), \"error\"))","v":7.5401587867428983},0,7.5401587867428983,"mW",null,"Psch(termRoth)",{"$f":"+D22*'System Config'!N25*'System Config'!N22","v":1.0179214362102913},{"$f":"+E22*'System Config'!N25","v":0},{"$f":"+F22*'System Config'!N25","v":2.0358428724205826},"mW",null,"Psys(termRoth)",{"$f":"J22","v":1.0179214362102913},0,1.0179214362102913,"mW"]
[null,"Term power for writes from another rank","Pds(termWoth)",{"$f":"  IF('DDR4 Config'!D$10=1,('DDR4 Config'!D$15/'System Config'!N7)*('System Config'!N15*('DDR4 Config'!D$8+'DDR4 Config'!D$20+'DDR4 Config'!D$21)),   IF('DDR4 Config'!D$10=2,   ('DDR4 Config'!D$15/'System Config'!N7)*('System Config'!N14*('DDR4 Config'!D$8+1+'DDR4 Config'!D$20+'DDR4 Config'!D$21)), \"error\"))","v":0},0,0,"mW",null,"Psch(termWoth)",{"$f":"+D23*'System Config'!N26*'System Config'!N24","v":0},{"$f":"+E23*'System Config'!N26","v":0},{"$f":"+F23*'System Config'!N26","v":0},"mW",null,"Psys(termWoth)",{"$f":"J23","v":0},0,0,"mW"]
[]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,"Total DRAM Power Consumed",null,null,{"$f":"SUM(R12:R21)","v":8.9321194097764867},"mW"]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,"2nd rank DRAM Power Consumed",null,null,{"$f":"SUM(R22:R23)","v":1.0179214362102913},"mW"]
[]
[]
[]
[null,"VCC",null,{"$f":"'System Config'!M8","v":"System VPP"},{"$f":"'System Config'!N8","v":2.5}]
[null,"FREQ",null,{"$f":"'System Config'!M9","v":"System CK frequency (data rate /2)"},{"$f":"'System Config'!N9","v":1600}]
[]
[]
[null,"Package Density",null,"Package Density",{"$f":"'Module Calc'!D7","v":32}]
[null,"IO",null,{"$f":"'DDR4 Config'!C8","v":"DRAM Width (Number of DQs per )"},{"$f":"'DDR4 Config'!D8","v":4}]
[null,"Speed Grade",null,{"$f":"'DDR4 Config'!C9","v":"Speed Grade"},{"$f":"'DDR4 Config'!D9","v":"-062E"}]

{"sheet":"Summary","index":7,"n_rows":55,"n_cols":18,"rows_kept":55,"cut":false,"hidden":false,"merged":[[7,1,7,4],[6,2,6,11]]}
[]
[]
[]
[]
[{"$f":"CONCATENATE('DDR4 Config'!D7,\" DDR4 SDRAM with \",'DDR4 Config'!D8,\" DQs and a \",'DDR4 Config'!D9,\" Speed Grade\", \",\",\" \", IF( 'DDR4 Config'!D$10= 1, \"DBI not enabled\", IF('DDR4 Config'!D$10=2, \"DBI enabled\", \"DBI selection is wrong\")))","v":"16Gb DDR4 SDRAM with 4 DQs and a -062E Speed Grade, DBI not enabled"}]
[]
[null,null,{"$f":"CONCATENATE(A49,\" \",A50,\" \",A51,\" All parameters are calculated and require no user input.\")","v":"System is operating at 1600 MHz clock with VDD = 1.2V and VPP=2.5V. Read bandwidth is 432 MT/s with write bandwidth of 208 MT/s. The DRAM terminates  640 MT/s. ACT commands are separated by 6.2ns on average. All parameters are calculated and require no user input."}]
[null,"Psys Power Consumption Summary"]
[null,null,null,"Total","VDD","VPP"]
[null,"ACT",null,{"$f":"'Power Calcs'!R17","v":0},{"$f":"'Power Calcs'!P17","v":0},{"$f":"'Power Calcs'!Q17","v":0},"mW"]
[null,null,"Activate Power",{"$f":"D10","v":0},{"$f":"E10","v":0},{"$f":"F10","v":0},"mW",null,null,"VDD Activate Power",{"$f":"$E$11","v":0}]
[null,"RD",null,{"$f":"'Power Calcs'!R19","v":0},{"$f":"'Power Calcs'!P19","v":0},{"$f":"'Power Calcs'!Q19","v":0},"mW",null,null,"VPP Activate Power",{"$f":"$F$11","v":0}]
[null,"WR",null,{"$f":"'Power Calcs'!R18","v":0},{"$f":"'Power Calcs'!P18","v":0},{"$f":"'Power Calcs'!Q18","v":0},"mW",null,null,"VDD RD/WR/Term Power",{"$f":"$E$16","v":8.9321194097764867}]
[null,"READ I/O",null,{"$f":"'Power Calcs'!R20","v":6.9317123265279621},{"$f":"'Power Calcs'!P20","v":6.9317123265279621},{"$f":"'Power Calcs'!Q20","v":0},"mW",null,null,"VPP RD/WR/Term Power",{"$f":"$F$16","v":0}]
[null,"Write ODT",null,{"$f":"'Power Calcs'!R21","v":2.0004070832485241},{"$f":"'Power Calcs'!P21","v":2.0004070832485241},{"$f":"'Power Calcs'!Q21","v":0},"mW",null,null,"VDD Background  Power",{"$f":"$E$22","v":0}]
[null,null,"RD/WR/Term Power",{"$f":"+D12+D13+D14+D15","v":8.9321194097764867},{"$f":"+E12+E13+E14+E15","v":8.9321194097764867},{"$f":"+F12+F13+F14+F15","v":0},"mW",null,null,"VPP Background  Power",{"$f":"$F$22","v":0}]
[null,"ACT_STBY",null,{"$f":"'Power Calcs'!R15","v":0},{"$f":"'Power Calcs'!P15","v":0},{"$f":"'Power Calcs'!Q15","v":0},"mW"]
[null,"PRE_STBY",null,{"$f":"'Power Calcs'!R13","v":0},{"$f":"'Power Calcs'!P13","v":0},{"$f":"'Power Calcs'!Q13","v":0},"mW",null,null,null,null,null,null,null,null,null,null," "]
[null,"ACT_PDN",null,{"$f":"'Power Calcs'!R14","v":0},{"$f":"'Power Calcs'!P14","v":0},{"$f":"'Power Calcs'!Q14","v":0},"mW"]
[null,"PRE_PDN",null,{"$f":"'Power Calcs'!R12","v":0},{"$f":"'Power Calcs'!P12","v":0},{"$f":"'Power Calcs'!Q12","v":0},"mW"]
[null,"REF",null,{"$f":"'Power Calcs'!R16","v":0},{"$f":"'Power Calcs'!P16","v":0},{"$f":"'Power Calcs'!Q16","v":0},"mW"]
[null,null,"Background  Power",{"$f":"SUM(D17:D21)","v":0},{"$f":"SUM(E17:E21)","v":0},{"$f":"SUM(F17:F21)","v":0},"mW",null,null,null,null,null,null,null,null,null,null," "]
[null,"Total DDR4 SDRAM Power",null,{"$f":"+D16+D11+D22","v":8.9321194097764867},{"$f":"+E16+E11+E22","v":8.9321194097764867},{"$f":"+F16+F11+F22","v":0},"mW",null,null,null,null,null,null,null,null,null,null," "]
[null,"TERM 2nd rank",null,{"$f":"+'Power Calcs'!R22+'Power Calcs'!R23","v":1.0179214362102913},{"$f":"+'Power Calcs'!P22+'Power Calcs'!P23","v":1.0179214362102913},{"$f":"+'Power Calcs'!Q22+'Power Calcs'!Q23","v":0},"mW",null,null,null,null,null,null,null,null,null,null," "]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null," "]
[]
[]
[]
[]
[]
[null,null,null,null,"VDD","VPP"]
[null,null,{"$f":"$B$10","v":"ACT"},{"$f":"$D$10","v":0},{"$f":"$E$10","v":0},{"$f":"$F$10","v":0}]
[null,null,{"$f":"$B$12","v":"RD"},{"$f":"$D$12","v":0},{"$f":"$E$12","v":0},{"$f":"$F$12","v":0}]
[null,null,{"$f":"$B$13","v":"WR"},{"$f":"$D$13","v":0},{"$f":"$E$13","v":0},{"$f":"$F$13","v":0}]
[null,null,{"$f":"$B$14","v":"READ I/O"},{"$f":"$D$14","v":6.9317123265279621},{"$f":"$E$14","v":6.9317123265279621},{"$f":"$F$14","v":0}]
[null,null,{"$f":"$B$15","v":"Write ODT"},{"$f":"$D$15","v":2.0004070832485241},{"$f":"$E$15","v":2.0004070832485241},{"$f":"$F$15","v":0}]
[null,null,{"$f":"$B$17","v":"ACT_STBY"},{"$f":"$D$17","v":0},{"$f":"$E$17","v":0},{"$f":"$F$17","v":0}]
[null,null,{"$f":"$B$18","v":"PRE_STBY"},{"$f":"$D$18","v":0},{"$f":"$E$18","v":0},{"$f":"$F$18","v":0}]
[null,null,{"$f":"$B$19","v":"ACT_PDN"},{"$f":"$D$19","v":0},{"$f":"$E$19","v":0},{"$f":"$F$19","v":0}]
[null,null,{"$f":"$B$20","v":"PRE_PDN"},{"$f":"$D$20","v":0},{"$f":"$E$20","v":0},{"$f":"$F$20","v":0}]
[null,null,{"$f":"$B$21","v":"REF"},{"$f":"$D$21","v":0},{"$f":"$E$21","v":0},{"$f":"$F$21","v":0}]
[null,null,{"$f":"$B$24","v":"TERM 2nd rank"},{"$f":"$D$24","v":1.0179214362102913},{"$f":"$E$24","v":1.0179214362102913},{"$f":"$F$24","v":0}]
[]
[]
[]
[]
[]
[]
[{"$f":"CONCATENATE(\"System is operating at \",'System Config'!N9,\" MHz clock with VDD = \",'System Config'!N7,\"V\",\" and VPP=\",'System Config'!N8,\"V.\")","v":"System is operating at 1600 MHz clock with VDD = 1.2V and VPP=2.5V."}]
[{"$f":"CONCATENATE(\"Read bandwidth is \",B52,\" MT/s with write bandwidth of \",B53,\" MT/s. The DRAM terminates  \",B54,\" MT/s.\")","v":"Read bandwidth is 432 MT/s with write bandwidth of 208 MT/s. The DRAM terminates  640 MT/s."}]
[{"$f":"CONCATENATE(\"ACT commands are separated by \",'System Config'!N28,\"ns on average.\")","v":"ACT commands are separated by 6.2ns on average."}]
[null,{"$f":"INT('System Config'!N9*'System Config'!N21*'DDR4 Config'!D8/8*20+0.999)/10","v":432},"MB/sec"]
["Read Bandwidth",{"$f":"INT('System Config'!N9*'System Config'!N23*'DDR4 Config'!D8/8*20+0.99)/10","v":208},"MB/sec"]
["Write Bandwidth",{"$f":"INT('System Config'!N9*('System Config'!N26+'System Config'!N25)*'DDR4 Config'!D8/8*20+0.99)/10","v":640},"MB/sec"]
["Term"]

{"sheet":"Module Calc","index":8,"n_rows":33,"n_cols":21,"rows_kept":33,"cut":false,"hidden":false,"merged":[[31,1,31,2],[15,1,15,3],[2,1,2,2],[3,1,3,2],[5,1,5,2],[8,1,8,2],[9,1,9,2],[10,1,10,2],[11,1,11,2],[16,1,16,3],[19,1,19,2],[24,1,24,2],[6,1,6,2],[7,1,7,2],[3,8,3,16],[4,16,6,16],[4,8,6,8],[4,10,6,10],[4,11,6,11],[4,15,6,15],[5,12,6,12],[5,13,6,13],[5,14,6,14],[4,12,4,14],[4,9,6,9]]}
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,2,1,1]
[]
[null,"Total Module Rank Quantity",null,{"$f":"INDEX(S4:S6,S1)","v":2}]
[null,"Module Type",null,{"$f":"INDEX(T4:T7,T1)","v":"RDIMM"},null,null,null,null,"DIMM Power Calculation",null,null,null,null,null,null,null,null,null,1,"RDIMM","yes"]
[null,"ECC ",null,{"$f":"INDEX(U4:U5,U1)","v":"yes"},null,null,null,null,"DDR4 Config","Package","DIMM Type","Data Rate MT/s","Device Power (mW)",null,null,"Total # Ranks","Average DIMM Power (W)",null,2,"UDIMM","no"]
[null,"Package Config",null,{"$f":"CONCATENATE(\"x\",'DDR4 Config'!D8)","v":"x4"},null,null,null,null,null,null,null,null,"Total Power","Background Power","Power Terminate",null,null,null,4,"SODIMM"]
[null,"Package Density (Gb)",null,{"$f":"IF(D8=\"SDP\",IF('DDR4 Config'!D7=\"4Gb\",4,IF('DDR4 Config'!D7=\"8Gb\",8,16)),IF('DDR4 Config'!D7=\"4Gb\",4,IF('DDR4 Config'!D7=\"8Gb\",8,16))*2)","v":32},null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"LRDIMM"]
[null,"Package Type",null,{"$f":"INDEX('DDR4 Config'!W3:W5,'DDR4 Config'!W1)","v":"DDP2R"},null,null,null,null,{"$f":"D6","v":"x4"},{"$f":"D8","v":"DDP2R"},{"$f":"D4","v":"RDIMM"},{"$f":"'DDR4 Config'!B9","v":3200},{"$f":"D31","v":8.9321194097764867},{"$f":"D32","v":0},{"$f":"D33","v":1.0179214362102913},{"$f":"D3","v":2},{"$f":"(D9+D12)*IF(D3=4,2,P8)*(M8+O8)/1000+D11","v":0.85820147045552397}]
[null,"Non-ECC Packages per rank",null,{"$f":"(64*D3/'DDR4 Config'!D8)/D3","v":16},null,null,null,null,"Important - Make sure the \"System Config\" tab usage conditions are configured correctly for your DIMM"]
[null,"Module Density (GB)",null,{"$f":"IF(D8=\"SDP\",(D7*D9*D3)/8,(D7*D9*(D3/2))/8)","v":64},null,null,null,null,{"$f":"IF(D20=0,\"WARNING: Make sure 'DDR4 Spec' tab is populated\",\"\")","v":"WARNING: Make sure 'DDR4 Spec' tab is populated"}]
[null,"Non-DRAM Component Power",null,{"$f":"IF(D4=\"LRDIMM\",2.75,IF(D4=\"RDIMM\",0.5,0))","v":0.5},null,null,null,null,{"$f":"IF(AND(OR(D4=\"LRDIMM\",D4=\"RDIMM\"),D5=\"no\"),\"WARNING: ECC must be set to 'yes' for LRDIMM/RDIMM\",\"\")","v":""}]
[null,"ECC Packages per rank",null,{"$f":"IF(D6=\"x16\",0,IF(D5=\"no\",0,D9/8))","v":2},null,null,null,null,{"$f":"IF(AND(D3=4,D8=\"SDP\"),\"WARNING: Cannot have 4 ranks if package=SDP\",\"\")","v":""}]
[null,null,null,null,null,null,null,null,{"$f":"IF(AND(D3<>4,D8=\"DDP2R\"),\"WARNING: Module ranks must be 4 if package=DDP\",\"\")","v":"WARNING: Module ranks must be 4 if package=DDP"}]
[]
[]
[null,"From \"Summary\" Tab"]
[null,{"$f":"CONCATENATE(D7, \"Gb \", \"DDR4  \",'DDR4 Config'!D8,\" DQs \",'DDR4 Config'!D9,\" Speed \",)","v":"32Gb DDR4  4 DQs -062E Speed "}]
[null,null,null,"Total"]
[null,"ACT",null,{"$f":"Summary!D10","v":0}]
[null,"Activate Power",null,{"$f":"D19","v":0}]
[null,"RD",null,{"$f":"Summary!D12","v":0}]
[null,"WR",null,{"$f":"Summary!D13","v":0}]
[null,"READ I/O",null,{"$f":"Summary!D14","v":6.9317123265279621}]
[null,"Write ODT",null,{"$f":"Summary!D15","v":2.0004070832485241}]
[null,"RD/WR/Term Power",null,{"$f":"+D21+D22+D23+D24","v":8.9321194097764867}]
[null,"ACT_STBY",null,{"$f":"Summary!D17","v":0}]
[null,"PRE_STBY",null,{"$f":"Summary!D18","v":0}]
[null,"ACT_PDN",null,{"$f":"Summary!D19","v":0}]
[null,"PRE_PDN",null,{"$f":"Summary!D20","v":0}]
[null,"REF",null,{"$f":"Summary!D21","v":0}]
[null,"DDR4 SDRAM Power",null,{"$f":"+D25+D20+D32","v":8.9321194097764867}]
[null,"Background  Power",null,{"$f":"SUM(D26:D30)","v":0}]
[null,"TERM 2nd rank",null,{"$f":"Summary!D24","v":1.0179214362102913}]

{"sheet":"Module Config (OLD)","index":9,"n_rows":29,"n_cols":26,"rows_kept":29,"cut":false,"hidden":true,"merged":[[8,0,8,2],[23,0,23,1],[11,0,11,1],[16,0,16,1],[1,1,1,2],[2,1,2,2]]}
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,1,1,1]
[null,"Rank Quantity",null,1]
[null,"Module Type",null,"RDIMM",null,null,null,null,null,null,null,null,null,null,null,1,"RDIMM","SDP"]
[null,"Die Config",null,{"$f":"CONCATENATE(\"x\",'DDR4 Config'!D8)","v":"x4"},null,null,null,null,null,null,null,null,null,null,null,2,"UDIMM"]
[null,"Die Density",null,{"$f":"'DDR4 Config'!D7","v":"16Gb"},null,null,null,null,null,null,null,null,null,null,null,4,"SODIMM"]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"LRDIMM"]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"DDR4 Config","DIMM","Data Rate MT/s","Power Total PR    (mW)","Power standby  (mW)","Power Terminate  (mW)","Ranks","DIMM Power (W)"]
[null,"Packages per rank",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"CONCATENATE(\"x\",'DDR4 Config'!D8)","v":"x4"},{"$f":"D3","v":"RDIMM"},{"$f":"'System Config'!N9","v":1600},{"$f":"C23","v":8.9321194097764867},{"$f":"C24","v":0},{"$f":"C25","v":1.0179214362102913},{"$f":"D2","v":1}]
[{"$f":"CONCATENATE('DDR4 Config'!D7,\" DDR4  \",'DDR4 Config'!D8,\" DQs \",'DDR4 Config'!D9,\" Speed \",)","v":"16Gb DDR4  4 DQs -062E Speed "},null,null,null,null,"DDR4","condition","stack","Data Rate MT/s","Power Total PR    (mW)","Power standby  (mW)","Power Terminate  (mW)","Rank","RDIMM power (W) "]
[null,null,"Total",null,null,"x4"," ","SDP"," ",281.19119096033802,86.227400119260594,27.387755461437521,"dual",{"$f":"  IF(F10=\"x4\",  (1*18*J10+(IF(M10=\"single\",0,1)*1*18*K10) +IF(M10=\"dual\",L10*18,0))/1000+0.5,\"na\")","v":7.6065142377386508}]
["ACT",null,{"$f":"Summary!D10","v":0},null,null,"x4"," ","SDP"," "," "," "," ","dual",{"$f":"  IF(F11=\"x4\",  (1*18*J11+(IF(M11=\"single\",0,1)*1*18*K11) +IF(M11=\"dual\",L11*18,0))/1000+0.5,\"na\")","v":{"$error":"#VALUE!"}}]
["Activate Power",null,{"$f":"C11","v":0},null,null,"x4"," ","SDP","  "," "," "," ","dual",{"$f":"  IF(F12=\"x4\",  (1*18*J12+(IF(M12=\"single\",0,1)*1*18*K12) +IF(M12=\"dual\",L12*18,0))/1000+0.5,\"na\")","v":{"$error":"#VALUE!"}}]
["RD",null,{"$f":"Summary!D12","v":0},null,null,"x4"," ","SDP"," "," "," "," ","dual",{"$f":"  IF(F13=\"x4\",  (1*18*J13+(IF(M13=\"single\",0,1)*1*18*K13) +IF(M13=\"dual\",L13*18,0))/1000+0.5,\"na\")","v":{"$error":"#VALUE!"}}]
["WR",null,{"$f":"Summary!D13","v":0}]
["READ I/O",null,{"$f":"Summary!D14","v":6.9317123265279621}]
["Write ODT",null,{"$f":"Summary!D15","v":2.0004070832485241}]
["RD/WR/Term Power",null,{"$f":"+C13+C14+C15+C16","v":8.9321194097764867}]
["ACT_STBY",null,{"$f":"Summary!D17","v":0}]
["PRE_STBY",null,{"$f":"Summary!D18","v":0}]
["ACT_PDN",null,{"$f":"Summary!D19","v":0}]
["PRE_PDN",null,{"$f":"Summary!D20","v":0}]
["REF",null,{"$f":"Summary!D21","v":0}]
["DDR4 SDRAM Power",null,{"$f":"+C17+C12+C24","v":8.9321194097764867},null,null,"DDR4","condition","stack","Number of pkg per Rank","Data Rate MT/s","Power Total PR    (mW)","Power standby  (mW)","Power Terminate  (mW)","Rank","UDIMM power (W) "]
["Background  Power",null,{"$f":"SUM(C18:C22)","v":0},null,null,null,null,null,null,null,null,null,null,"single",{"$f":"  (1*I24*K24+(IF(N24=\"single\",0,1)*1*I24*L24) +IF(N24=\"dual\",M24*I24,0))/1000+0","v":0}]
["TERM 2nd rank",null,{"$f":"Summary!D24","v":1.0179214362102913},null,null,null,null,null,null,null,null,null,null,"single",0]
[null,null,null,null,null,null,null,null,null,null,null,null,null,"dual",0]
[null,null,null,null,null,null,null,null,null,null,null,null,null,"dual",0]
[null,null,null,null,null,null,null,null,null,null,null,null,null,"dual",0]
[null,null,null,null,null,null,null,null,null,null,null,null,null,"dual",0]